EDA Blog - electronic design automation, embedded systems, ic

Design and Verification Conference Call for Papers

Posted by Ken Cheung in Events, Training on Tuesday, September 11, 2007

DVCon
The 2008 Design and Verification Conference (DVCon) is now accepting paper, panel and tutorial submissions. The DVCon Technical Program Committee is seeking topics about low-power design and verification, formal verification, multi-clock verification, design and verification case studies, verification and design release management, functional coverage and verification data management, verification methodology and testbenches, verification IP development, and appropriate academic and research information.

Paper and special session proposals are due September 19, 2007. Special sessions may consist of embedded tutorials of one to two hours in length or may be focused on a specific topic with a list of invited papers/presentations relevant to that topic. Panel proposals are due September 19, 2007. and sponsored tutorials are due October 3, 2007

More info:
DVCon 2008 Call for Paper, Panel, Tutorial Proposals
DVCon

Related Posts with Thumbnails
 
EDA Blog Newsletter
Don't have time to visit EDA Blog everyday? Then sign up for our free newsletter. We'll send you an email when we have something to share with you. Your email address will be kept confidential and we will not share, sell, or rent it to anyone. You can unsubscribe at any time by clicking a link in the email.

Enter your email address to sign up for our free newsletter:  

If you are familiar with RSS feeds, you can also sign up for our free blog feed. Our RSS feed is updated in real-time while our newsletter is updated daily.