Agilent Rolls Out Half-Height GPIB Interface PCIe Card
Agilent Technologies Inc. (NYSE: A) introduced a PCIe-GPIB half-height interface card for compact next-generation PCs that harnesses the fast data transfer rate of PCI Express to support high-bandwidth PC applications.
Apache Design to Host Methodology Presentations at DAC
Apache Design Solutions, the leader in power signoff and complete silicon integrity platform solutions for system-on-chip (SoC), analog intellectual property (IP), and system designs, announced that they will be hosting methodology presentations delivered by designers from Broadcom, Cisco Systems, LSI, STMicroelectronics, and Texas Instruments at the Design Automation Conference (DAC) in San Diego, California.
Wavesat – Finalist for WiMAX World Europe Award
xchange announced that Wavesat has been selected as a finalist to receive the Industry Choice WiMAX World Europe 2007 Award for its WiMAX Mini-PCI design. The awards recognize leaders in the development and deployment of WiMAX technologies. Nominations were open to exhibitors and sponsors of the WiMAX World Europe Conference being held May 29-31, in Vienna, Austria. Having received nearly 40 submissions, a select judging panel of experts from the WiMAX community narrowed the field to 13 finalists, including (company) (product). It is now up to their peers to determine the winner.
Silicon Navigator to Demonstrate New Engines for RDE Framework at DAC
Silicon Navigator(TM), a leading provider of broad-based Electronic Design Automation (EDA) solutions based natively on the Open Source, OpenAccess database, will exhibit at the Design Automation Conference (DAC), demonstrate its newest engines for its Rocket Design Environment(TM) (RDE(TM)) framework and show how CAD developers can use RDE to implement highly productive design environments for their end users. The company is participating in the Interoperable PCell Library (IPL) showcase at the Synopsys Interoperability breakfast and the IPL booth. And, Silicon Navigator CEO, George Janac, will speak about Migrating IPL Designs at the IPL Lunch Workshop.
Silicon Navigator Rolls Out New Engines for the RDE Framework
Silicon Navigator(TM) Corporation, a leading provider of broad-based Electronic Design Automation (EDA) solutions based natively on the Open Source, OpenAccess database, announced three new software engines for its RDE Framework (RDE)- SKILL compatible PCell Editor, RTL Power Analysis and Schematic Editor. The engines augment RDE’s existing engines for RTL processing, Static timing analysis, Layout editing, Mask processing, data translation, and graphic display.
Tundra to Improve Organizational Alignment and Cost Structure
Tundra Semiconductor Corporation (TSX:TUN), a leader in System Interconnect, announced that the Company is implementing a plan to control costs and continue to align the global organization more closely with the Company’s long-term growth strategy.
MIPS to Present Reference Methodology at Design Automation Conference
MIPS Technologies, Inc. (Nasdaq: MIPS) a leading provider of industry-standard processor architectures and cores for digital consumer, networking, personal entertainment, communications and business applications, announced that the company will present with Magma (R) Design Automation (Nasdaq: LAVA) at the Design Automation Conference (DAC), San Diego Convention Center, booth 4578, June 5-6, 2007.
Tensilica Reveals Plans for Design Automation Conference
Tensilica(R), Inc., provider of the broadest line of controller, CPU and specialty DSP processors on the market today, will participate in a number of workshops and panels at the 44th Annual Design Automation Conference (DAC) held June 4-8, 2007, in San Diego.
Full-Day Tutorials at Design Automation Conference
Registration is still open for the tutorials offered on Monday, June 4 and Friday, June 8 as part of the 44th Design Automation Conference, happening June 4-8 at the San Diego Convention Center in San Diego, Calif. A total of seven tutorials will be offered to provide design engineers valuable, in-depth, technical information on a wide variety of today’s most challenging design topics, including variability, system design for embedded multimedia devices, formal verification techniques, design of high-performance power delivery networks, soft errors, design and yield, and low power design. The registration fee for the tutorials is $300 per tutorial and includes continental breakfast, lunch, coffee breaks, and tutorial notes. Attendees can register for the conference, including these tutorials, online at the DAC Web site or at the conference.
Gleichmann Announces NEC’s 8-bit 78K0/Lx3 Microcontrollers
NEC Electronics’ new 8-bit 78K0/Lx3 microcontrollers (MCUs) include on-chip drivers for 88 to 288 liquid crystal display (LCD) segments. The new MCUs are available with 8 kilobytes (KB) to 60 KB of embedded flash memory and RAM from 512 bytes to 2 KB, in pin counts ranging from 48 to 80. Key features include: three ADC options (no ADC, 10-bit SAR ADC, 16-bit Delta-Sigma ADC and 10-bit SAR ADC), 8 MHz internal high speed oscillator, RTC having counter for year, month, week, day, hour, minute, second, on-chip debug function, watchdog timer, on-chip power on clear (POC), on-chip clock and buzzer output functions, on-chip key interrupt function as well as remote controller receiver.
Renesas Licenses SiRF GPS Baseband IP Blocks for SuperH SH7775
SiRF Technology Holdings, Inc. (Nasdaq: SIRF), a leading provider of GPS-enabled silicon and premium software location platforms, announced Renesas Technology Corp. has licensed SiRF GPS baseband IP blocks to location-enable its new SuperH(TM) Family SH7775, an SoC (system on chip) solution designed for high-performance car information systems (CIS). With its embedded SiRF GPS capabilities, the Renesas SH7775 will provide automotive OEMs and their Tier-1 suppliers worldwide with a solid foundation for building the next generation of affordable in-dash navigation, telematics and auto information systems, and offers SiRF entry into the lucrative automotive market in Japan and elsewhere through its partnership with that country’s leading in-vehicle platform supplier.
XYALIS Unveils Advanced Methodology for Building CMP Models
XYALIS announce that thanks to “non destructive” nanometric measurement equipment’s, XYALIS is able to build Chermo Mechanical Planarization (CMP) models. These models are used for estimating the critical areas where dummy filling is needed to smooth the thickness variation.
Laker Custom IC Design Tools Feature Built-in DFM Capabilities
Silicon Canvas, developer of the Laker suite of high-performance tools for custom IC design, announced the release of the first design for manufacturability (DFM)-compliant technology files offering built-in DFM targeting TSMC advanced process technologies.