EDA News – 2007.05.29

NAVAIR Awards Real-Time Innovations Contract for Navy E-2C Hawkeye
Real-Time Innovations (RTI), The Real-Time Middleware Experts, announced the award of a Small Business Innovative Research (SBIR) Phase II contract by the Naval Air Systems (NAVAIR) Command. The SBIR program, which is federally funded, facilitates the financing of small-business research and development activities. It enables the initial development of concepts and inventions with significant potential in advancing the state of the art and development of innovative products.

AMCC Announces Cycle Accurate Simulator for nP3705 Packet Processor
Applied Micro Circuits Corp. (NASDAQ:AMCC), a global leader in embedded Power Architecture(TM) processing, optical transport and storage solutions, announced the availability of a Cycle Accurate Simulator (CAS) for the nP3705 packet processor. The CAS provides software developers with a virtual system prototyping solution that is generated from the nP3705 design files. This hardware-accurate model of the design provides customers with an early development platform that facilitates system debug and verification.

Microchip Unveils Microcontrollers With Integrated Certified USB 2
Microchip Technology Inc., a leading provider of microcontroller and analog semiconductors, announced the eight-member PIC18F87J50 high-performance, cost-effective 8-bit microcontroller family with an integrated and certified USB 2.0 Full-Speed, 12 Mbps transceiver. This new USB microcontroller family also provides 12 MIPS performance with ample I/O and a rich selection of analog and digital peripherals for embedded systems designers who require Full-Speed USB connectivity. Unlike competitors’ products that can only serve as an interface between a serial port and the USB bus, the PIC18F87J50 family can perform as the sole controller in embedded applications.

Optimal to Demonstrate 3D Power, Signal Integrity Analysis Tools at DAC
Optimal Corporation(TM) will demonstrate its 3D power and signal integrity analysis tools for integrated circuit (IC) package, System-in-Package (SiP) and printed circuit board (PCB) design in Booth #3063 during the 44th Design Automation Conference (DAC). DAC will be held June 4-8 at the San Diego Convention Center in San Diego, Calif.

Tundra Tsi578 Passes RIOLAB Level 3 Device Interoperability Test
RIOLAB(TM), a division of Fabric Embedded Tools Corporation and the world’s only independent RapidIO(R) interoperability testing facility, announced that the Tundra Semiconductor Tsi578(TM), (10GCLYZ2), Serial RapidIO switch is a Device Interoperability Level 3 (DIL-3) Qualified Device, having successfully passed DIL-3, DIL-2 and DIL-1 testing against all other vendor devices in the RIOLAB hardware library.

EVE to Showcase Fast Emulation, Easy FPGA Prototyping at DAC
EVE, broad-line supplier of hardware-assisted verification, will exhibit during the 44th Design Automation Conference (DAC) in booth #4060 June 4-7 at the San Diego Convention Center, San Diego, Calif. It will showcase the broadest selection of hardware-assisted verification solutions including acceleration, fast emulation and easy field programmable gate array (FPGA) prototyping available in the industry today. Highlights include demonstrations of simulation acceleration, hardware/software co-verification, transaction-based verification and in-circuit emulation at real speed.

Lattice Improves ispLEVER FPGA Design Tools by 12%
Lattice Semiconductor Corporation (NASDAQ: LSCC) announced major performance and functional enhancements in Version 7.0 of its ispLEVER(R) FPGA design tools. Optimized logic synthesis, map, and place-and-route algorithms have boosted Lattice FPGA performance demonstrably by 12% on average, with certain large, system-level benchmark circuits benefiting by an over 40% improvement, compared to the previous ispLEVER release. Tool performance has also been substantially improved, dramatically reducing design fit runtime and workstation memory requirements. In addition, the ispLEVER 7.0 software features Reveal(TM), Lattice’s second generation logic analysis / hardware debug tool, a more accurate and user friendly Power Calculator module and a variety of enhancements to the LatticeMico32(TM) embedded open source microprocessor design tools. Full support for the newly announced LatticeXP2(TM) 90nm non-volatile FPGA device family has been added to Lattice’s ever growing portfolio of supported architectures.

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Lattice Semiconductor Launches LatticeXP2 FPGA Family
Lattice Semiconductor Corporation (NASDAQ: LSCC) announced the availability of its third generation non-volatile FPGAs, the LatticeXP2(TM) family. With enhanced capabilities, the LatticeXP2 family doubles maximum logic capacity to 40K Look Up Tables (LUTs), improves performance 25% and adds dedicated DSP blocks, all while reducing the price per function by up to 50%. Power consumption has also been optimized on the 1.2-volt process technology, reducing static power usage by 33%. Designed using the industry’s most advanced non-volatile FPGA technology, a 90nm embedded Flash process co-developed with Lattice’s foundry partner Fujitsu, the LatticeXP2 devices provide the “instant-on” and reduced footprint benefits of earlier Lattice non-volatile devices, while also enhancing design security, RAM back-up and live update capabilities.

Xilinx’s New FPGA Solutions Simplify Memory Interface Designs
Xilinx, Inc. (Nasdaq: XLNX), the world’s leading supplier of programmable solutions, announced immediate availability of its low cost Spartan(TM)-3A FPGA development kit for DDR2 SDRAM interfaces, the Virtex(TM)-5 FPGA development platform (ML-561) for multiple high-performance memory interfaces (I/Fs), and the memory interface generator (MIG) software version 1.7. These complete solutions enable FPGA users to quickly implement and verify custom memory interface designs across various data rates and bus widths thus accelerating time-to-market.

Tundra Licenses Ericsson’s MicroTCA Carrier Hub Switching Module
Tundra Semiconductor Corporation (TSX:TUN), the leader in System Interconnect, announced a collaboration with Ericsson (NASDAQ:ERIC), the leading wireless infrastructure provider, to license the Switching Module of a MicroTCA Carrier Hub (MCH) card, designed by Ericsson with Tundra’s Tsi578(TM) Serial RapidIO(R) Switch. The license granted to Tundra includes sub-licensing rights and Tundra will be sub-licensing the design as the Tsi578 MicroTCA Switching Module (MSM), thereby broadening the availability of Serial RapidIO-based MicroTCA Systems.

Strategic Test Rolls Out First PCI Express Waveform Digitizers
Strategic Test, one of the world’s leading suppliers of PC-based waveform digitizer and oscilloscope cards, has announced the availability of the world’s first PCI Express based Waveform Digitizer boards.

Sierra Targets 45nm Physical Design with New Technologies
Sierra Design Automation(TM), Inc., the technology leader in place-and-route solutions, announced the availability of several innovations to Sierra’s place and route (P&R) platform. These capabilities address critical 45nm design challenges including interconnect resistance variation, complex design rule checks (DRCs) and yield. The new technologies are built on Sierra’s proven variability-driven physical design platform – the only solution that can comprehensively handle variations in design modes, process corners, and lithography. These capabilities are targeted at high-end customers in different market segments such as wireless, handheld, graphics, set-top boxes, networking and processors.

Renesas, VaST to Develop Virtual Prototypes of Processor Platforms
VaST Systems announced a global partnership with the Automotive Business Unit of Renesas Technology Corporation to develop and deliver virtual prototypes of Renesas’ high-performance processor platforms using VaST technology. The platforms will be used by mutual customers worldwide for software development, architectural analysis, and system verification.

Enea to Present at MicroTCA Summit
Enea, (Nordic Exchange/Small Cap/ENEA), a world leading provider of network software and services, announced that Terry Pearson, vice president of product management at Enea, will present at the upcoming MicroTCA Summit, taking place at the Sheraton Inner Harbor in Baltimore, MD on May 30-June 1, 2007. Pearson will speak at panels and breakout sessions on best practices for MicroTCA application development.