Denali Creates Design Cores, Verification IP for I/O Virtualization
Denali Software, Inc., a world-leading provider of electronic design automation (EDA) software and intellectual property (IP), announced the availability of design cores and verification IP which support the preliminary I/O virtualization (IOV) specifications from the PCI-SIG. IOV is a key technology that enables systems to simultaneously share PCI Express (PCIe) resources within multi-CPU systems, or across multiple operating systems. Vendors are now architecting data centers and large storage environments that use IOV technology to increase performance and reduce overall power and system costs. Denali’s Databahn(TM) PCIe IOV cores and PureSpec(TM) PCIe verification IP products are now being used by developers to accelerate the design and verification of these systems, and speed overall deployment of PCI Express IOV technology.
Wi-Fi Alliance Selects Marvell TopDog WLAN for 802.11n Test Bed
Marvell (NASDAQ: MRVL), the leader in storage, communications, and consumer silicon solutions, announced that the Marvell(R) TopDog(TM) WLAN solutions have been selected to be part of the Wi-Fi CERTIFIED(TM) 802.11n draft 2.0 test bed, demonstrating Marvell’s continuous dedication to the development of next-generation WLAN technology.
SAES Getters, ST Team on Multi-Axis MEMS Gyroscopes
The SAES(R) Getters Group, world leader in getter technology for high vacuum applications, and STMicroelectronics(NYSE: STM), a leader in the manufacture and sale of MEMS (Micro Electro-Mechanical Systems) devices, have signed a co-operation agreement that will support development and production of next-generation MEMS gyroscopes. STMicroelectronics’ gyroscopes will integrate SAES’ PageWafer(R), the most advanced getter thin-film solution for high vacuum maintenance in wafer-level packaged MEMS, to deliver higher device sensitivity and stability.
Stream Processors to Present at Microprocessor Forum
Stream Processors, Inc. (SPI), a fabless semiconductor company that is making parallel processing simple, announced that its co-founder, chairman and chief scientist, Bill Dally, will present at this year’s In-Stat Microprocessor Forum.
Mobile WiMAX PlugFest Highlights Interoperability
The WiMAX Forum(R) has brought 33 companies from the Mobile WiMAX(TM) equipment and test equipment communities together for the third public Mobile WiMAX PlugFest, an interoperability showcase hosted by AT4 Wireless and ETSI in Sophia Antipolis, France. The PlugFest kicked off on Sunday, May 13, 2007 and concludes on Saturday, May 19, 2007.
Realtek Adopts Synopsys Design Compiler Topographical Technology
Synopsys, Inc. (Nasdaq: SNPS), a world leader in semiconductor design software, announced that Realtek Semiconductor Corp. has adopted Synopsys’ Design Compiler(R) topographical technology to reduce the design cycle time for its communications network, computer peripheral and multimedia products by more than 30 percent. Design Compiler topographical technology tightly correlates to physical implementation, allowing Realtek designers to address problem areas while still in synthesis and eliminate iterations with physical layout. As a result, designs can be completed quickly and cost-effectively.
Mentor Graphics to Discuss Future of Semiconductor Industry
Mentor Graphics Corporation (Nasdaq: MENT) announced that Walden C. Rhines, the company chairman and CEO, will join “Luminaries: The Semiconductor Crystal Ball,” a panel to discuss the future of the semiconductor industry on Saturday, May 19, 2007 at TiEcon. TiEcon, the largest convention for entrepreneurs, takes place at the Santa Clara Convention Center in Santa Clara, CA on May 18 and 19.
Nu Horizons, Xilinx Expand into Australia, New Zealand
Nu Horizons Electronics Corp. (NASDAQ:NUHC), a leading global distributor of advanced technology semiconductor, illumination, display and system solutions, announced the expansion of their long-standing authorized distribution agreement with Xilinx Inc. (NASDAQ: XLNX), the world’s leading provider of programmable solutions, into the countries of Australia and New Zealand. This agreement augments the existing relationship between both companies in North America, Europe and Asia Pacific for the distribution of all Xilinx field-programmable gate arrays (FPGAs), including the Virtex(TM) and Spartan(TM) product lines, complex programmable devices (CPLDs), software design tools and intellectual property cores.
Concept Engineering Joins In-Sequence Technology Program
Sequence Design announced that Concept Engineering has joined its In-Sequence Technology Partner Program, promoting EDA interoperability and advanced design methodologies. Concept Engineering is integrating its visualization technology into Sequence’s low-power analysis and optimization tools to improve exploration and debug capabilities.
Sequence Debuts PowerTheater-Explorer for Power Visualization, Debug
Sequence Design announced PowerTheater-Explorer, an innovative option to the industry’s premier RTL power analysis engine, PowerTheater, that adds state-of-the-art power visualization and debug capabilities for fast, interactive power reduction.