EDA News – 2007.03.19

TI, EWA Unveil XDS560 Trace for Non-Intrusive, Real-Time Data Capture
Texas Instruments Incorporated (TI) (NYSE: TXN) has partnered with EWA Blackhawk to deliver the XDS560(TM) Trace module, a non-intrusive, hardware-based trace tool offering advanced visibility and capabilities for debugging the specialized problems that arise in high-performance, real-time embedded applications, as well as for fine-tuning code performance and cache optimization of complex multi-channel applications. Real-time visibility and a high-speed interface provide developers with the detailed information they require to determine where and why complex, intermittent problems occur.

In-Stat Reveals Details of Microprocessor Forum
In-Stat announces this year’s program for Microprocessor Forum 2007. This year’s Microprocessor Forum agenda will showcase a mix of large and small companies presenting new processors in sessions that reflect the changes in our industry. The event will begin with a Monday seminar, a tutorial conference presented by experts from different companies. The day-long seminar will provide a selection of topics in power-efficient video and multicore chip design, system software, and software development tools. A few papers will provide refresher information in support of conference presentations addressing topics such as process technology, multicore architecture, and high-reliability computing.

OpenMake Meister Features Build Forensics
OpenMake Software released OpenMake Meister, an innovative seventh-generation build-to-release management solution and community-developed build-to-release knowledgebase. Through its innovative Build Services and Build Forensics features, Meister links development efforts to production results while reducing script redundancies and build errors. Build Services provides a layer of virtualization from ad-hoc scripting, enabling build best practices and build project management. In addition, Meister extends the OpenMake Mojo build-process automation solution by going beyond simple workflow management and process automation to support software construction in more than 200 languages and environments.

Actel Optimizes ARM Cortex-M1 Processor Core for FPGAs
Actel Corporation (Nasdaq: ACTL) announced the availability of its implementation of the ARM(R) Cortex(TM)-M1 processor, a small, high-performance, 32-bit soft core co-developed by the companies for optimal use in field-programmable gate arrays (FPGAs). Removing the license and royalty fees typically associated with licensing models for industry-leading processor cores, Actel offers free access to advanced ARM processor technology to the broad marketplace. The free delivery of the Cortex-M1 processor for use in Actel’s flash-based, M1-enabled Actel Fusion and ProASIC3 FPGAs provides system designers programmable flexibility and system-level integration, enabling the development of low-cost, high-performance systems.

Xilinx Creates Virtex-5 FPGA Development Kit for PCI Express
Xilinx, Inc. (NASDAQ: XLNX), the world’s leading supplier of programmable solutions, announced the availability of the Virtex(TM)-5 FPGA Development Kit for PCI Express(R). The development kit is based on the Virtex(TM)-5 family of FPGAs, the industry’s first 65nm FPGA to be listed on the PCI SIG(R) integrators list. The complete solution includes a development kit and protocol pack files that accelerate time-to-market for designers developing 1-8 lane PCIe(R) applications in communications and networking, video and broadcast, storage and computing, industrial as well as aerospace/defense markets. Designers now have access to everything needed to evaluate and confidently design with the Xilinx end-point block for PCI Express.

Xilinx Unveils PlanAhead 9.1 Design Suite with PinAhead Technology
Xilinx, Inc. (NASDAQ: XLNX) announced immediate availability of the 9.1 version of PlanAhead(TM) hierarchical design and analysis software with support for its newest high-performance 65nm Virtex(TM)-5 and Spartan-3 generation FPGAs. Used in conjunction with the Xilinx Integrated Software Environment (ISE(TM)) design tools, the PlanAhead 9.1 design suite delivers an additional option for designers to optimize the maximum performance of the company’s latest 65nm Virtex-5 FPGAs. Leveraging the unique advantages of the Virtex-5 ExpressFabric(TM) technology, 550 MHz DSP48E slices, and flexible clock management tiles, the PlanAhead 9.1 design suite delivers unprecedented levels of performance – as high as a two speed-grade advantage over competing solutions.

Altera Introduces Quartus II Design Software Version 7
Altera Corporation (NASDAQ:ALTR) introduced Quartus(R) II software version 7.0 with support for the entire 65-nm Cyclone(R) III FPGA family in both its Subscription Edition and free Web Edition. The Cyclone III support within Web Edition marks the highest device density available within any FPGA vendor’s free software package. The advanced technology and productivity features in Quartus II software allow designers to exploit the full potential of the Cyclone III family and achieve 50 percent lower power consumption, compared to the previous generation family, and three speed grades faster than the nearest low-cost FPGA competitor.

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Altera Rolls Out Cyclone III FPGAs
Altera Corporation (NASDAQ: ALTR) announced the immediate availability of the Cyclone(R) III family, the industry’s first 65-nm low-cost FPGAs. Cyclone III FPGAs consume 75 percent less power than competing FPGAs and deliver 5K to 120K logic elements (LEs), up to 4 Mbits of memory and up to 288 digital signal processing (DSP) multipliers. At 20 percent lower cost per LE than the previous generation, the Cyclone III family enables designers to use FPGAs in more cost-sensitive applications than previously possible.

UMC Adopts Synopsys TetraMAX Diagnostics for Rapid Yield Learning
UMC has adopted Synopsys (Nasdaq: SNPS) TetraMAX(R) diagnostics to accelerate yield learning for designs that utilize the Synopsys DFT MAX scan compression automation solution. Rapid yield learning depends on the accuracy and efficiency of failure analysis, a manually intensive and time-consuming process of identifying the individual circuit in a design that could cause a device to fail. Using Synopsys TetraMAX diagnostics to perform this task automatically on DFT MAX-compressed scan patterns, UMC engineers were able to substantially decrease the time and effort required for failure analysis.

Mentor Offers Synthesis Support for Altera Cyclone III FPGAs
Mentor Graphics Corporation (NASDAQ:MENT) announced that its suite of advanced synthesis products supports the newly introduced Cyclone(R) III field programmable gate arrays (FPGAs) from Altera Corporation. Both companies have been in close cooperation to ensure Precision(R) Synthesis support for the full range of Cyclone III devices. Beta support for the new family is currently available in Precision Synthesis, with production support scheduled for release in April.

Synplicity Announces Support for Altera’s Cyclone III FPGAs
Synplicity, Inc. (Nasdaq:SYNP), a leading supplier of software for the design and verification of semiconductors, announced immediate support for Altera Corporation’s low-cost Cyclone III FPGAs. Synplicity optimized its Synplify Pro(R) FPGA synthesis software to provide a fast, easy-to-use solution that enables Cyclone III customers to quickly reach their timing goals, while achieving cost reduction through optimal area utilization.

Aldec Supports Altera’s Cyclone III FPGAs
Aldec, Inc., a pioneer in mixed-language simulation and advanced design tools for ASIC and FPGA devices, announced full support in its Active-HDL and Riviera lines of products for Altera Corporation’s new low-cost Cyclone III device family. Aldec has updated its Active-HDL Design Flow Manager to support the Cyclone III FPGA family and provide access to Altera’s Quartus II software version 7.0 and third-party synthesis tools. Since Active-HDL and Riviera users have access to precompiled Cyclone III libraries, they may use this new family in their designs immediately.

NASA Uses ThreadX RTOS in Mars Reconnaissance Orbiter Spacecraft
Express Logic, Inc., the worldwide leader in royalty-free real-time operating systems (RTOS), announced that its ThreadX RTOS has been used by NASA in its ongoing Mars Reconnaissance Orbiter (MRO) spacecraft. The MRO mission is to map the surface of Mars with high-resolution and infrared imaging sensors so scientists can gain a better understanding of the Red Planet, including its past or present ability to support any form of life. ThreadX was the RTOS selected to manage the cameras responsible for the unprecedented quality of image currently being collected.

Ambric to Present Paper, Serve on Panel at Multicore Expo
Ambric will present a paper and serve on a panel at the Multicore Expo 2007 event. Steve Frison will present a paper entitled, “Solving the Programming Bottleneck for Massively-Parallel MIMD Applications.” Mike Butts will serve on a panel discussing the topic “Will Interconnect Be A Bottleneck for Multicore Platforms?” Steve Frison is Ambric’s vice president of software engineering and Mike Butts is a Fellow and lead chip architect at Ambric.

Longcheer Selects u-blox’s LEA-4S Module for G300 GPS Phone
u-blox AG, the leading Swiss provider of GPS receiver technology, announced the inclusion of its LEA-4S GPS module in the G300 GPS phone made by Longcheer, a leading Chinese designer of handheld devices. The new phone combines a high performance GPS engine, VGA camera, MP3/MP4 music player, GSM phone and WAP Internet browser in a device that weighs only 102 grams, measures just 117 x 50 x 16.5 mm, and has ultra long standby time.