Virage Logic will present a free online technical webinar titled, “How to Achieve Dramatic Area Savings and Power Reduction for Consumer and Secure Applications with Next Generation Embedded Non-Volatile Memory.” The live webinar will take place on Tuesday, February 27, 2007, at 11:00 am PST (2:00 pm EST).
Attendees of this informative webinar will learn how the next-generation NOVeA(R), manufactured on a standard CMOS logic process with no additional masking, process steps or process modifications, delivers significant area and power reductions to better address today’s advanced consumer and secure application requirements.
The event will cover:
- The technical attributes that the next generation of NOVeA offers to help provide developers with more area and power saving features that are important in consumer applications and in passive RFID tags, where the read distance is governed by power consumption
- How NOVeA’s 100 percent cell redundancy architecture helps provide designers with high yield and reliability
- The applications which are driving the requirement for multi-time programmable embedded non-volatile memory which can be run on a standard CMOS logic process