EDA News – 2007.01.22

  • RapidIO Trade Association, Light Reading Sponsor RapidIO Webinar
    The RapidIO Trade Association and Light Reading have teamed up to sponsor a webinar, “RapidIO: Ready and Steady,” to be held on January 30, 2007 at 12:00 p.m. ET/5:00 p.m. GMT. This event will provide an update on the standard and explain the business benefits of adopting RapidIO technology as more products become available and the focus shifts towards interoperability and design. The event will be moderated by Simon Stanley from Earlswood Marketing.
  • ABI Research Predicts 25% of Handsets Shipped in 2011 Will be sub-$20
    The global market for sub-$20 ultra low cost handsets (UCLH) will be over 330 million units in 2011. A new study from ABI Research finds that over 50% of these handsets will be shipped in the emerging markets of Asia Pacific and the remainder in markets of Africa, Middle East, Latin America, and Eastern Europe.
  • Freescale RF CMOS 90nm Transceiver Reduces EDGE Subsystem Size by 50%
    Expanding its RF offerings for Enhanced Data Rates for GSM Evolution (EDGE) handset design, Freescale Semiconductor unveiled its first RF CMOS 90-nanometer transceiver. The new RFX275-30 is a transceiver subsystem that offers industry-leading low transmit and receive current, high receiver sensitivity and compact size. It accelerates phone manufacturers’ integration time via simplified programming. Additionally, the new subsystem delivers lower total cost of ownership by significantly shortening test time in manufacturing and bill of materials through integration.
  • SBE and Neonode to Merge
    SBE, Inc. (Nasdaq:SBEI) and Neonode, Inc., a privately-held, Swedish mobile handset developer, announced the execution of a definitive merger agreement. Although the exact number of shares to be issued in the merger will be determined at closing according to a formula contained in the merger agreement, it is currently estimated that SBE will issue approximately 57 million shares of its common stock in exchange for outstanding shares of Neonode common stock and will assume options and warrants exercisable for approximately 17 million additional shares of SBE common stock. It is expected that the current board of directors of Neonode will become the board of directors of SBE upon the closing.
  • Xilinx Introduces Virtex-4 FX Based ML410 Development Platform
    Xilinx announced immediate availability of its lead-free, RoHS compliant ML410 development platform. Based on the Virtex(TM)-4 FX60 FPGA, the ML410 provides designers with a high performance logic fabric, two embedded PowerPC(R) 405 processors and a considerable quantity of high-speed serial I/O with integrated transceivers. When paired with the Xilinx Embedded Development Kit (EDK) and extensive catalog of IP peripherals, the ML410 platform provides a comprehensive embedded development system that enables rapid prototyping and verification of embedded system designs.
  • Lattice Releases Extreme Performance FPGAs for Volume Production
    Lattice Semiconductor (NASDAQ: LSCC) announced that the first members of its Extreme Performance(TM) LatticeSC(TM) and LatticeSCM(TM) (LatticeSC/M) FPGA families have been fully qualified and released to volume production. The Extreme Performance LatticeSC/M devices are designed to provide the unsurpassed performance and connectivity essential for high-speed system applications. Fabricated on leading-edge 90nm CMOS process technology utilizing 300mm wafers, LatticeSC/M FPGAs are packed with features that accelerate chip-to-chip, chip-to-memory, high-speed serial, backplane and network data path connectivity.
  • Lattice Semiconductor Reduces FPGA Costs with FreedomChip
    Lattice Semiconductor (NASDAQ: LSCC) announced the FreedomChip(TM) cost reduction methodology for its Extreme Performance(TM) LatticeSC(TM) and LatticeSCM(TM) (“LatticeSC/M”) FPGA families. Customers can reduce the price of selected high volume LatticeSC/M FPGA designs from 30% to 75% by converting to the pin compatible Lattice FreedomChip device with a fully integrated, seamless design methodology.
  • Xilinx Rolls Out ISE WebPACK 9.1i IDE with SmartCompile Technology
    Xilinx, Inc. (NASDAQ: XLNX) announced the immediate availability of the Integrated Software Environment (ISE(TM)) WebPACK(TM) 9.1i release – the latest version of the company’s free downloadable programmable logic design suite. The new version includes all the features of the 9.1i release of the popular Xilinx ISE Foundation(TM) software with full support for optional embedded, digital signal processing (DSP) and real-time debug design flows. Most notably, ISE WebPACK 9.1i software includes the new Xilinx SmartCompile(TM) technology, which significantly improves run times by up to 6x faster than the previous version, while maintaining exact design preservation of unchanged logic.
  • Microchip Introduces High-Speed, 10 MHz, 32 Kbit SPI Serial EEPROMs
    Microchip Technology Inc., a leading provider of microcontroller and analog semiconductors, announced it has expanded its 32 Kbit SPI serial EEPROM family with the 25AA320A and 25LC320A (25XX320A) devices. Capable of speeds up to 10 MHz, the new devices are available in very low-profile MSOP and TSSOP packages, as well as most standard packages. They enable customers to easily upgrade 32 Kbit designs to 10 MHz, while enjoying Microchip’s high endurance, quality, on-time delivery and short lead times.
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