EDA News – 2006.10.30

  • Sequence, Synfora Optimize SoC Power and Architecture
    Sequence Design and Synfora Inc. today announced the creation of an integrated flow incorporating Sequence’s PowerTheater RTL power-analysis tool with Synfora’s PICO Express Application Engine Synthesis (AES). Strengthening the collaboration, Synfora has joined the InSequence Technology Partner Program, promoting EDA interoperability and advanced design methodologies.
  • Command and Control in C3D Demonstration Includes Quantum3D Technology
    CG2, Inc., a wholly owned subsidiary of Quantum3D, Inc., announced today that software developed under a Phase II contract from the U.S. Army Communications Electronics Research, Development and Engineering Center (CERDEC), Ft. Monmouth, NJ, under the Small Business Innovative Research (SBIR) program is being employed in the fall Air Assault Expeditionary Force (AAEF) C4ISR On-The-Move experiment at Ft. Benning, GA.
  • Ramtron to Showcase FRAM Technology at Electronica Show
    Ramtron International Corporation (Nasdaq: RMTR), a leading developer and supplier of nonvolatile ferroelectric random access memory (FRAM) and integrated semiconductor products, has announced that it will showcase its new FRAM-Enhanced(TM) FM3130 Processor Companion, two new 512-kilobit serial FRAM memory devices, the FM25L512 and FM24C512, as well as the FM20L08, a 1-megabit parallel FRAM device, at the Electronica 2006 Trade Fair (booth A5.321). Ramtron will also present at the show the VRS51L3074, the first FRAM-Enhanced(TM) 8051-based microcontroller. Electronica 2006 will take place from November 14 to 17 at the New Munich Trade Fair Centre in Munich, Germany.
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  • TI’s Ultra Low-Power Programmable DSP Extends Battery Life
    Continuing to drive innovation in low power audio/voice applications, Texas Instruments Incorporated (TI) (NYSE: TXN) announced today the lowest-power addition to its line of ultra low-power programmable digital signal processors (DSPs). The new TMS320C5506 DSP requires just 0.12 mW of power in standby mode and includes other power-efficient features that make it the lowest-power processor in its class. A full 128 KB of on-chip memory makes for greater programming ease, and a full-speed USB 2.0 interface supplies cost-efficient wired connectivity. Among the many high-volume applications that can benefit from the C5506 DSP’s low-power, memory, connectivity and affordability are touch screen controllers, USB headsets, cordless phones and hands-free car phone kits.
  • TI Introduces Complete Hands Free Kit (HFK) Reference Design
    Simplifying system design of hands-free cellular phone kits for automobiles, Texas Instruments Incorporated (TI) (NYSE: TXN) today announced the availability of a complete Hands Free Kit (HFK) Reference Design for use with the new TMS320C54HFK digital signal processor (DSP).
  • Lattice Rolls Out ispClock5316S, ispClock5320S Clock Distribution ICs
    Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced it has expanded its ispClock(TM)5300S family of in-system programmable, zero-delay, single-ended clock buffer devices with the production release of the pin-compatible ispClock5316S (16-output) and the ispClock5320S (20-output) ICs. The E2CMOS(R)-based ispClock5300S device family now offers programmable clock skew, termination and interface standard support in a series of five devices with 4 to 20 outputs.
  • Lattice Unveils PCI Express IP Cores for LatticeECP2M, LatticeSCM FPGAs
    Lattice Semiconductor (NASDAQ: LSCC) today announced the availability of new PCI Express Intellectual Property (IP) cores in its ispLeverCORE(TM) portfolio. A new PCI Express core optimized for the newly announced LatticeECP2M(TM) low-cost FPGA family implements a single-chip PCI Express x1 endpoint solution with integrated SERDES that is ideal for high-volume, low-cost and limited form-factor applications. New PCI Express x1 and x4 cores also are available for the LatticeSCM(TM) FPGA family, which are suitable for system applications requiring the highest integration and performance. The IP cores are available within the IPexpress(TM) flow supported by Lattice’s ispLEVER(R) 6.0 Service Pack 1, or later, design tool suite.
  • Xilinx Reduces Power, Extends Performance with XtremeDSP Development Tools
    Xilinx, Inc. (NASDAQ: XLNX) today announced the immediate availability of version 8.2 of its XtremeDSP(TM) development tools. These tools consist of the System Generator for DSP and AccelDSP(TM), which feature optimized DSP support for Xilinx Virtex(TM)-5 LX and LXT, the industry’s only 65nm FPGAs. The new version of the software tools enable DSP system designers and algorithm developers, who are unfamiliar with FPGAs, to design, simulate and verify DSP systems, achieving up to 40 percent lower power, 10 percent higher DSP performance and significantly reduced area compared to previous generation Virtex-4 LX FPGAs.
  • Xilinx, AXIS Debut W-CDMA, WiMAX Integrated Radio Card Platform
    Xilinx, Inc. (NASDAQ: XLNX), the leading FPGA supplier to the wireless infrastructure market, and AXIS Network Technology today announced the immediate availability of CDRSX, a common digital radio system (CDRS) development platform that increases power amplifier (PA) efficiency and reduces capital and operating costs for W-CDMA and WiMAX base stations. The CDRSX development platform consists of the Xilinx W-CDMA and WiMAX digital front-end (DFE) reference designs and the flexible AXIS Virtex(TM)-based development board to provide a power efficient, quick time-to-market route from concept-to-production for wireless digital radio cards.
  • Xilinx Unveils MicroBlaze Spartan-3E 1600E Embedded Development Kit
    Xilinx, Inc. (NASDAQ: XLNX) today released the MicroBlaze(TM) Development Kit: Spartan(TM)-3E 1600E Edition, a comprehensive design environment with everything embedded developers need to create processing-based systems. The Spartan-3E 1600E Edition delivers an integrated platform with hardware, design tools, intellectual property (IP) and reference designs to kick-start the development process. The fully integrated kit allows developers to rapidly customize their processor and IP to best suit their specific application and configure complete systems.
  • Microchip Rolls Out MPLAB REAL ICE Emulation System
    Microchip Technology Inc., a leading provider of microcontroller and analog semiconductors, today announced the MPLAB(R) REAL ICE(TM) emulation system for the development of applications employing Microchip’s PIC(R) microcontrollers and dsPIC(R) Digital Signal Controllers (DSCs). Addressing the need for increased controller memory speed and cable interconnection distances, the MPLAB REAL ICE emulation system offers low-cost, next-generation emulation support for Microchip’s high-speed microcontrollers and DSCs.
  • Intel Software Partner Program Upgrades Ardence to Associate Partner
    Ardence, the global leader in developing software platforms for the on-demand world, today announced that its membership in the Intel(R) Software Partner Program has been upgraded to Associate Partner in recognition of ongoing commitment to developing and selling products based on Intel platforms.
  • Tundra Promotes Robert Fischer to Vice President of World Wide Sales
    Tundra Semiconductor Corporation (TSX:TUN), the world leader in System Interconnect, today announced that Robert Fischer has been promoted to the position of Vice President of Sales, effective immediately.
  • Advantech to Support ETX 3.0 Standard
    The ETX(R) 3.0 standard initiated by Kontron is growing again. Advantech, one of the founding member of the original ETX standard, has agreed to support the ETX 3.0 upgrade and work with Kontron on the upcoming ETX 3.01 revision of the specification.
  • Denali DDR Memory Controller IP Records Over 200 Design Wins
    Denali Software, Inc., a world-leading provider of electronic design automation (EDA) software and intellectual property (IP), today announced that its Databahn(TM) DDR memory controller IP has been licensed for use in 210 designs, spanning consumer, computing, and communication markets. Denali’s Databahn solution enables chip developers to meet application-specific performance requirements while providing significant time-to-market advantages.