- Common Platform Gains ARM Low-Power and High-Performance Libraries
ARM [(LSE:ARM); (Nasdaq:ARMHY)] today announced that Common Platform technology business partners IBM, Chartered Semiconductor Manufacturing and Samsung Electronics Co., Ltd., have licensed ARM(R) Metro(TM) low-power and Advantage(TM) high-performance products, part of its Artisan(R) Physical IP family, for the technology alliance’s 45-nanometer (nm) Low-Power (LP) process technology.
- Neah Power Receives Patent for Bonding Electrodes
Neah Power Systems, Inc. (Pink Sheets:NPWS), a Nevada corporation announces that it has been issued U.S. Patent No. 7,118,822 titled “Fuel Cell Electrode Pair Assemblies and Related Methods.” Neah’s patented porous silicon fuel cell technology is able to leverage the existing infrastructure of microelectronic packaging technology for semiconductor, photonic and MEMS applications.
- NASA Studies Sun with Radiation-Hardened Computers from BAE Systems
BAE Systems’ radiation-hardened computers and solid-state recorders are helping to navigate NASA’s Solar Terrestrial Relations Observatory (STEREO) spacecraft on their mission to study the effects of the sun’s solar flares. Two identical STEREO spacecraft were launched from Cape Canaveral, Fla., Oct. 25, on the same rocket. The two satellites will give scientists a three-dimensional view of the sun from different orbits.
- Virage Logic, Apache Design to Present Low-Power Design Webinar
Virage Logic Corporation (Nasdaq:VIRL), a pioneer in Silicon Aware IP(TM) and leading provider of semiconductor intellectual property (IP) platforms, today announced that it will partner with Apache Design Solutions, the technology leader in full-chip dynamic power and noise solutions for system-on-chip (SoC) designs, to present a free online technical webinar titled, “Low-Power Design – Tips and Techniques for Extending Battery Life.”
- XJTAG Speeds Debug and Test of Complex BGA Circuits for Prism
Prism Electronics, a UK-based contract electronics manufacturer (CEM), has selected the XJTAG boundary scan development system to speed up the process of debugging and testing highly complex printed circuit boards featuring high pin count ball grid array (BGA) devices such as field programmable gate arrays (FPGAs).