EDA News – 2006.10.19

  • ETRI Accelerates Tapeout with Design Compiler Topographical Technology
    Synopsys, a world leader in semiconductor design software, announced that the Electronics and Telecommunications Research Institute (ETRI), Korea’s leading research and development organization, has used Synopsys Design Compiler(R) topographical technology to expedite the tapeout of their new 90-nanometer (nm) multimedia chip. The key requirement for this high-performance, low-power video application was achieving the chip’s performance targets within a very tight schedule. ETRI designers needed a solution that could reduce the iterations between synthesis and layout while delivering best-in-class quality of results. Using the Design Compiler topographical technology, ETRI achieved their design goals in a single-pass flow with no iterations between synthesis and layout, which significantly reduced turnaround time.
  • AdventNet Rolls Out QEngine Issue Manager 4 for Bug Tracking
    AdventNet Inc., a pioneer and leading provider of affordable Enterprise IT Management & IT security software, today, announced the release of QEngine Issue Manager (QIM). The cost-effective and web-based issue and bug tracking software increases the productivity of IT managers and QA analysts by helping them effectively track and manage bugs and other project-related issues.
  • BFO Creates World Class Text Extraction for PDF Library
    Big Faceless Organization (BFO), provider of high quality Java software components, have enhanced the smartest Java class library on the market. Version 2.7.3 of the Big Faceless PDF Library includes heavily reworked font handling, providing enhanced performance to text extraction and PDF rendering in those slightly out of the ordinary documents.
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  • TI’s MSP430 Advanced Technical Conference Features Ultra-Low-Power MCU
    Attendees of the 2006 Texas Instruments Incorporated (TI) (NYSE: TXN) MSP430 Advanced Technical Conference (ATC) will discover the latest MSP430 ultra-low power microcontroller (MCU) technology and have the opportunity to expand their MCU design expertise through a choice of hands-on labs, in-depth technical lectures and collaboration with MSP430 MCU technology experts for low power, portable design tips and tricks.
  • IMEC Creates Power Efficient Reconfigurable Processor for Video Decoding
    IMEC developed a reconfigurable processor for video decoding achieving power efficiencies 6 to 12 times higher than state-of-the-art C-programmed processors. The processor was derived from IMEC’s C-programmable ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) using its corresponding compiler. It proves that ADRES and its compiler are very well suited for time efficient integration in future low-power portable wireless multimedia devices.
  • IMEC Demonstrates Potential of FinFETs for Analog, RF Applications
    IMEC demonstrated the potential of FinFETs by realizing the world’s first operational RF circuits and operational amplifiers using FinFETs with 45nm physical gate length and a metal-gate high-k gate stack. For applications at relatively low frequencies (below 5GHz) that demand a high-gain, FinFET technology offers better circuit performance than planar bulk CMOS. The speed of FinFETs still has to be improved for applications at higher frequencies.