Software Holding up Electronic System Design

Posted by Ken Cheung in EDA Tools on Tuesday, July 25, 2006

According to Gartner Dataquest, embedded software development is the biggest problem with system-on-chip (SoC) design. For several years now, the EDA industry has been holding the cost of IC design to the $10 to $20 million range. However, the cost of design continued to increase because of the cost of embedded software.

Gartner Dataquest also thinks chipmakers are turning to multicore SoCs as a way of confronting power problems. As a result, there is a need for concurrent software compilers that can help designers program multicore SoCs. Parallel programming is well understood for supercomputer applications. However, programming asynchronous, heterogeneous systems is much more difficult.

Source: EE Times

If you found this page useful, bookmark and share it on:

Possibly of Interest

 
EDA Blog Newsletter
Don't have time to visit EDA Blog everyday? Then sign up for our free newsletter. We'll send you an email when we have something to share with you. Your email address will be kept confidential and we will not share, sell, or rent it to anyone. You can unsubscribe at any time by clicking a link in the email.

Enter your email address to sign up for our free newsletter:  

If you are familiar with RSS feeds, you can also sign up for our free blog feed. Our RSS feed is updated in real-time while our newsletter is updated daily.