HSPICE – Just Got Faster, Again! Webcast
This morning I got an email about the free HSPICE webcast, which will take place on Wednesday, May 17th, at 2:00 pm eastern/11:00 am pacific time. The webcast targets design engineers, CAD engineers, and engineering management supporting IC, board, or package designs, or RF design and verification. The one-hour web seminar will cover:
- Performing faster simulations
- Ensuring silicon accuracy with advanced models
- Improving productivity with behavioral modeling
- Employing high-speed signal integrity analysis capabilities
- Simulating process variability effects
- Accurately predicting PLL and VCO performance
- Performance enhancements
- Verilog–A behavioral modeling
- Signal integrity
- CosmoScope(TM) waveform analysis
- PLL / VCO analysis
- Design for yield – simulating variability
Presenters:
- Dr. Kishore Singhal
Synopsys Scientist - Dr. Scott Wedge
Sr. Staff Engineer - Chris Labrecque
HSPICE Marketing Manager - Felix Ruan
HSPICE Corporate
Applications Engineer
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